RTEMS Logo

RTEMS 4.9.3 On-Line Library


M68xxx and Coldfire Specific Information Register Usage

PREV UP NEXT Bookshelf RTEMS CPU Architecture Supplement

5.2.2: Register Usage

As discussed above, the bsr and jsr instructions do not automatically save any registers. RTEMS uses the registers D0, D1, A0, and A1 as scratch registers. These registers are not preserved by RTEMS directives therefore, the contents of these registers should not be assumed upon return from any RTEMS directive.


PREV UP NEXT Bookshelf RTEMS CPU Architecture Supplement

Copyright © 1988-2008 OAR Corporation