RTEMS 4.9.1 On-Line Library

MIPS Specific Information Vectoring of an Interrupt Handler

RTEMS CPU Architecture Supplement

6.4.1: Vectoring of an Interrupt Handler

Upon receipt of an interrupt the XXX family members with separate interrupt stacks automatically perform the following actions:

A nested interrupt is processed similarly by these CPU models with the exception that only a single ISF is placed on the interrupt stack and the current stack need not be switched.

RTEMS CPU Architecture Supplement