RTEMS CPU Architecture Supplement
As discussed above, the bsr and jsr instructions do not automatically save any registers. RTEMS uses the registers D0, D1, A0, and A1 as scratch registers. These registers are not preserved by RTEMS directives therefore, the contents of these registers should not be assumed upon return from any RTEMS directive.
> > The SH1 has 16 general registers (r0..r15) > > r0..r3 used as general volatile registers > > r4..r7 used to pass up to 4 arguments to functions, arguments above 4 are > > passed via the stack) > > r8..13 caller saved registers (i.e. push them to the stack if you need them > > inside of a function) > > r14 frame pointer > > r15 stack pointer >
RTEMS CPU Architecture Supplement
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