RTEMS CPU Architecture Supplement
During the execution of directive calls, critical sections of code may be executed. When these sections are encountered, RTEMS disables Critical Interrupts, External Interrupts and Machine Checks before the execution of this section and restores them to the previous level upon completion of the section. RTEMS has been optimized to insure that interrupts are disabled for less than RTEMS_MAXIMUM_DISABLE_PERIOD microseconds on a RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz PowerPC 603e with zero wait states. These numbers will vary based the number of wait states and processor speed present on the target board. [NOTE: The maximum period with interrupts disabled is hand calculated. This calculation was last performed for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
If a PowerPC implementation provides non-maskable interrupts (NMI) which cannot be disabled, ISRs which process these interrupts MUST NEVER issue RTEMS system calls. If a directive is invoked, unpredictable results may occur due to the inability of RTEMS to protect its critical sections. However, ISRs that make no system calls may safely execute as non-maskable interrupts.
RTEMS CPU Architecture Supplement
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