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RTEMS 4.7.2 On-Line Library

MIPS Specific Information Vectoring of an Interrupt Handler

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4.4.1: Vectoring of an Interrupt Handler

  • MIPS Specific Information Models Without Separate Interrupt Stacks
  • MIPS Specific Information Models With Separate Interrupt Stacks

    • Depending on whether or not the particular CPU supports a separate interrupt stack, the XXX family has two different interrupt handling models.

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