RTEMS PowerPC Applications Supplement
The maximum period with traps disabled or the processor interrupt level set to it's highest value inside RTEMS is less than TBD microseconds including the instructions which disable and re-enable interrupts. The time required for the PowerPC to vector an interrupt and for the RTEMS entry overhead before invoking the user's trap handler are a total of 61 microseconds. These combine to yield a worst case interrupt latency of less than TBD + 61 microseconds at na Mhz. [NOTE: The maximum period with interrupts disabled was last determined for Release 4.0.0-lmco.]
The maximum period with interrupts disabled within RTEMS is hand-timed with some assistance from PSIM. The maximum period with interrupts disabled with RTEMS occurs was not measured on this target.
The interrupt vector and entry overhead time was generated on the PSIM benchmark platform using the PowerPC's decrementer register. This register was programmed to generate an interrupt after one countdown.
RTEMS PowerPC Applications Supplement
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