RTEMS Motorola MC68xxx Applications Supplement
The maximum period with interrupts disabled within RTEMS is less than TBD microseconds including the instructions which disable and re-enable interrupts. The time required for the MC68020 to vector an interrupt and for the RTEMS entry overhead before invoking the user's interrupt handler are a total of 9 microseconds. These combine to yield a worst case interrupt latency of less than TBD + 9 microseconds at 20 Mhz. [NOTE: The maximum period with interrupts disabled was last determined for Release 3.2.1.]
It should be noted again that the maximum period with interrupts disabled within RTEMS is hand-timed and based upon worst case (i.e. CPU cache disabled and no instruction overlap) times for a 20 Mhz MC68020. The interrupt vector and entry overhead time was generated on an MVME135 benchmark platform using the Multiprocessing Communications registers to generate as the interrupt source.
RTEMS Motorola MC68xxx Applications Supplement
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