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RTEMS 4.6.0pre5 On-Line Library


Miscellaneous Processor Endianness

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10.2: Processor Endianness

  • Miscellaneous Specifying Processor Endianness
  • Miscellaneous Optional Endian Conversion Routines
  • Endianness refers to the order in which numeric values are stored in memory by the microprocessor. Big endian architectures store the most significant byte of a multi-byte numeric value in the byte with the lowest address. This results in the hexadecimal value 0x12345678 being stored as 0x12345678 with 0x12 in the byte at offset zero, 0x34 in the byte at offset one, etc.. The Motorola M68K and numerous RISC processor families is big endian. Conversely, little endian architectures store the least significant byte of a multi-byte numeric value in the byte with the lowest address. This results in the hexadecimal value 0x12345678 being stored as 0x78563412 with 0x78 in the byte at offset zero, 0x56 in the byte at offset one, etc.. The Intel ix86 family is little endian. Interestingly, some CPU models within the PowerPC and MIPS architectures can be switched between big and little endian modes. Most embedded systems use these families strictly in big endian mode.

    RTEMS must be informed of the byte ordering for this microprocessor family and, optionally, endian conversion routines may be provided as part of the port. Conversion between endian formats is often necessary in multiprocessor environments and sometimes needed when interfacing with peripheral controllers.


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